Scratch Registers - GE SBC330 3U VPX Hardware Reference Manual

6.20 Scratch Registers

Publication No. SBC330-0HH/3
The SBC330 has two 16‐bit scratch registers for user applications.
These are read‐write registers and are initialized to 0x0000.
Chip Select CS2
Offset 0x0064 and 0x0068
LAD Bit Reg Bit R/W
15 0 R/W
14 1 R/W
13 2 R/W
12 3 R/W
11 4 R/W
10 5 R/W
9 6 R/W
8 7 R/W
7 8 R/W
6 9 R/W
5 10 R/W
4 11 R/W
3 12 R/W
2 13 R/W
1 14 R/W
0 15 R/W
Description
User defined bit 0
User defined bit 1
User defined bit 2
User defined bit 3
User defined bit 4
User defined bit 5
User defined bit 6
User defined bit 7
User defined bit 8
User defined bit 9
User defined bit 10
User defined bit 11
User defined bit 12
User defined bit 13
User defined bit 14
User defined bit 15
Reset Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FPGA Registers 71