Mpx (Platform) Bus; Memory; Memory Map - GE SBC330 3U VPX Hardware Reference Manual

5.3 Memory

26 SBC330 3U VPX Single Board Computer

5.2.3 MPX (Platform) Bus

The MPX bus, connecting the processing cores to the host bridge functions, is
integrated into the device and so can run at up to 533 MHz (build level 5),
(600 MHz for build level 1): more than twice as fast as an external
implementation. This gives increased memory bandwidth and reduced latency,
allowing a significant performance increase.

5.3.1 Memory map

The SBC330 supports a fully programmable memory map, defined by the
MPC8641D processor.
A default memory map for the VxWorks 6.6 BSP release (TB0787‐001) is included
here (Figure 5‐2) for general reference, but since the memory map is almost
completely software configurable, see the applicable software manual for more
information.
Table 5-2 VxWorks Default Memory Map
Internal 32-bit Core 0
FFFF FFFF
FF80 0000
FF7F FFFF
FF00 0000
FEFF FFFF
FEF0 0000
FEEF FFFF
FEE0 0000
FEDF FFFF
FE80 0000
FE7F FFFF
FE40 0000
FE3F FFFF
FE00 0000
FDFF FFFF
FC00 8000
FC00 7FFF
FC00 0000
FBFF FFFF
F800 0000
F7FF FFFF
F000 0000
EFFF FFFF
E000 0000
Internal 32- bit Core 1
FFFF FFFF
FF80 0000
FF7F FFFF
FF00 0000
FEFF FFFF
FEF0 0000
FEEF FFFF
FEE0 0000
FEDF FFFF
FE80 0000
FE7F FFFF
FE40 0000
FE3F FFFF
FE00 0000
FDFF FFFF
FC00 8000
FC00 7FFF
FC00 0000
FBFF FFFF
F800 0000
F7FF FFFF
F000 0000
EFFF FFFF
E000 0000
8 MByte Boot Flash
Core 1 boot Flash when defined in
Firmware
CCSR
Shared memory
PCIe 2 I/O
PCIe 1 I/O
FPGA registers
AXIS
Reserved
User Flash
Publication No. SBC330-0HH/3