Miscellaneous Functions Register; Amp/Smp Mode; Pex8518 Mode - GE SBC330 3U VPX Hardware Reference Manual

6.9 Miscellaneous Functions Register

58 SBC330 3U VPX Single Board Computer
This register provides a list of lesser‐used options for board operation, mainly
concerned with the operation of the PLX PEX8518 and PEX8114 PCIe devices. It
defaults to a value that is partially set by jumpers.
Chip Select CS2
Offset 0x0028
Reset value 0x0096
LAD Bit Reg Bit R/W
15 0 R/W
14 & 13 1 & 2 R/W
12 3 R/W
11 4 R/W
10 5 R/W
9 6 R/W
8 7 R/W

6.9.1 AMP/SMP mode

In Symmetric Multiprocessing (SMP) mode, both cores boot from the same image
and run the same OS. In Asymmetric Multiprocessing (AMP) mode, each core can
run separate operating systems or it can run the same OS and operate in a loosely
coupled manner.
Flash access is different between SMP and AMP, and in SMP the processor adds
256 MByte offsets to core 1 addresses (this may be overridden ‐ details will be
added when SMP software is running). See Section 4.4.2
mode selection.

6.9.2 PEX8518 mode

The PEX8518 Switch device defaults to a mode selected by strapping resistors.
This mode can be overridden by the CPLD. Swapping the mode allows a blank
SBC330 to be Flash‐programmed over PCIe from another host during production.
Description
AMP or SMP mode
0 = AMP mode (default, P12 pins 1 & 2 not linked)
1 = SMP mode
PEX8518_MODE(0:1)
00 = Reserved/Invalid
01 = Dual Host mode
10 = Intelligent Adapter
11 = Transparent mode (default)
PCIe Spread Spectrum Clocking control
0 = Off (default)
1 = On
PEX SROM write protection
0 = Off
1 = On (default)
PEX8114 SROM Presence detect
0 = Present
1 = Disabled (default)
PEX8518 SROM Presence detect
0 = Present
1 = Disabled (default)
2
I C Boot EEPROM Write Protect
0 = Write enabled
1 = Write protected (default)
Reset Value
0
1
0
1
1
1
1
regarding AMP/SMP
Publication No. SBC330-0HH/3