P2 Connector Signal Definitions - GE SBC330 3U VPX Hardware Reference Manual

Table 9-9 P2/J2 Signal Definitions
Signal Direction
COMn_232CTS I/O
COMn_232RTS I/O
GPIO(0..7) I/O
NC
NOT USED
P2_EXT_INT_ROOT_CO Input
MP_1
PCIEn_RXnN/P Input
PCIEn_TXnN/P Output
PS2_5V Output
SATAn_RX_N/P Input
SATAn_TX_N/P Output
SEQ IN Input
SEQ OUT Output
USBn_N/P I/O
Publication No. SBC330-0HH/3

9.2.9 P2 connector signal definitions

Description
RS232 Clear To Send - hardware flow control COMn
RS232 Ready To Send - hardware flow control COMn
These 3.3V digital lines can be Software controlled to be inputs or outputs. As
inputs they may be used to generate an input. They are protected from over-
voltage and over-current by in-line FET Quick Switch devices
Connector pin is not connected to any signal
Backplane signal is not used by SBC330
Factory functional test use only
8-lane PCI-Express link B/2, lane x Receive data differential pair
8-lane PCI-Express link B/2, lane x transmit data differential pair
SBC330 provides fused 5V power to Keyboard and Mouse devices.
The fuse prevents the SBC330 against any harmfully high user generated
voltages
Serial ATA channel n receive data differential pair
Serial ATA channel n transmit data differential pair
Power Sequencing Input. Pulled up to P3V3_AUX via 10K resistor.
Connected to 1014A PWR Manager.
Driving this signal low can prevent the SBC330 from powering its main
supplies to allow control of in-rush current in a system. The Software and
Firmware must be set up to notice this input
Power Sequencing Output. Tied high via 10K resistor. The 1014A Power
manager can drive this signal low to prevent other boards in the system
powering if required to reduce system in-rush currents
Differential signal pairs for USB channel n
Connectors and Cables 83