Platform Multiplier Register - GE SBC330 3U VPX Hardware Reference Manual

6.7 Platform Multiplier Register

56 SBC330 3U VPX Single Board Computer
This register is loaded during power‐up/reset with hard‐coded values. It contains
the same values as those that are passed into the 8641 PORPLLSR for the
associated bits. Their meaning is given in the 8641D specification and repeated
below for convenience.
Writing to the register has no effect until the board is reset.
This register is 'sticky' through a front panel reset, i.e. the processor speed may be
changed by writing to this register and pressing reset. If the processor does not
boot, e.g. because the memory is not capable of working at a higher speed, then
cycling the power returns the register to its safe power up default.
Take care when selecting multiplier values as only a few are valid and produce
sensible results.
Chip Select CS2
Offset 0x0020
Reset value Most probably set to 6:1 (0110) for early boards for a 400 MHz
platform clock
LAD Bit Reg Bit R/W
15 0 R/W
14 1 R/W
13 2 R/W
12 3 R/W
From the 8641D specification:
Table 6-3
Signal Binary
LA[28:31] 0100
0101
0110
0111
1000
1001
Description Reset Value
ADD28 Variant dependent
ADD29 Variant dependent
ADD30 Variant dependent
ADD31 Variant dependent
Platform Clock (MPX Bus)
Multiplier
4:1
5:1
6:1
Reserved. Not valid
8:1
9:1
Comments
Default for 400 MHz platforms
Default for 533 MHz platforms
Publication No. SBC330-0HH/3