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17.2.4
Serial Status Register (SCSSR1)
Bit 4 of SCSSR1 has a different function in smart card interface mode. Coupled with this, the
setting conditions for bit 2 (TEND) are also different.
Bit:
Initial value:
R/W:
Note: * Only 0 can be written, to clear the flag.
Bits 7 to 5: Operate in the same way as for the normal SCI. See section 15, Serial Communication
Interface, for details.
Bit 4—Error Signal Status (ERS): In smart card interface mode, bit 4 indicates the status of the
error signal sent back from the receiving side during transmission. Framing errors are not detected
in smart card interface mode.
Bit 4: ERS
0
1
Note: Clearing the TE bit in SCSCR1 to 0 does not affect the ERS flag, which retains its previous
state.
Bit 3—Parity Error (PER): Operates in the same way as for the normal SCI. See section 15,
Serial Communication Interface, for details.
7
6
TDRE
RDRF
1
0
R/(W)*
R/(W)*
Description
Normal reception, no error signal
[Clearing conditions]
•
Power-on reset, manual reset, standby mode, or module standby
•
When 0 is written to ERS after reading ERS = 1
An error signal has been sent from the receiving side indicating detection of
a parity error
[Setting condition]
•
When the low level of the error signal is detected
5
4
ORER
FER/
ERS
0
0
R/(W)*
R/(W)*
3
2
PER
TEND
0
1
R/(W)*
R
Rev. 4.0, 04/00, page 617 of 850
1
0
—
—
0
0
R
R/W
(Initial value)
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