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CLK
A25–A0
D63–D0
CMD
ID1, ID0
Figure 14.43 Single Address Mode/Burst Mode/Level Detection/
CLK
A25–A0
D63–D0
CMD
DQMn
ID1, ID0
Figure 14.44 Single Address Mode/Burst Mode/Edge Detection/Byte, Word, Longword,
Quadword/External Bus → → → → External Device Data Transfer
Rev. 4.0, 04/00, page 492 of 850
Wait for next DMA request
CA
DTR
MD = 10
RD
Start of data transfer
External Bus → → → → External Device Data Transfer
CA
DTR
MD = 01
RD
CA
D0
D1 D2 D3
RD
CA
D0
Idle cycle
RD
D0 D1 D2 D3
CA
D2
D3
Idle cycle
RD
Idle cycle
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