Hitachi SH7750 series Hardware Manual page 323

Table 13.7 32-Bit External Device/Big-Endian Access and Data Alignment
Operation
Access
Size Address No. D31–D24 D23–D16 D15–D8 D7–D0
Byte 4n 1
4n+1 1
4n+2 1
4n+3 1
Word 4n 1
4n+2 1
Long- 4n 1
word
Quad- 8n 1
word
8n+4 2
Rev. 4.0, 04/00, page 312 of 850
Data Bus
Data —
7–0
— Data
7–0
— —
— —
Data Data
15–8 7–0
— —
Data Data
31–24 23–16
Data Data
63–56 55–48
Data Data
31–24 23–16
:(6, :(6
:(6 :(6
&$66, &$66
&$66 &$66
DQM3
— — Asserted
— —
Data —
7–0
— Data
7–0
— — Asserted Asserted
Data Data
15–8 7–0
Data Data Asserted Asserted Asserted Asserted
15–8 7–0
Data Data Asserted Asserted Asserted Asserted
47–40 39–32
Data Data Asserted Asserted Asserted Asserted
15–8 7–0
Strobe Signals
:(5, :(5 :(4, :(4 :(3 :(3,
:(5 :(5 :(4 :(4 :(3 :(3
&$65, &$65 &$64 &$64, &$63 &$63,
&$65 &$65 &$64 &$64 &$63 &$63
DQM2 DQM1 DQM0
Asserted
Asserted
Asserted
Asserted Asserted