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Bit 0—Loopback Test (LOOP): Internally connects the transmit output pin (TxD2) and receive
input pin (RxD2), and the 5765 pin and &765 pin, enabling loopback testing.
Bit 0: LOOP
0
1
16.2.10 FIFO Data Count Register (SCFDR2)
SCFDR2 is a 16-bit register that indicates the number of data bytes stored in SCFTDR2 and
SCFRDR2.
The upper 8 bits show the number of transmit data bytes in SCFTDR2, and the lower 8 bits show
the number of receive data bytes in SCFRDR2.
SCFDR2 can be read by the CPU at all times.
Bit:
Initial value:
R/W:
These bits show the number of untransmitted data bytes in SCFTDR2. A value of H'00 indicates
that there is no transmit data, and a value of H'10 indicates that SCFTDR2 is full of transmit data.
Bit:
Initial value:
R/W:
These bits show the number of receive data bytes in SCFRDR2. A value of H'00 indicates that
there is no receive data, and a value of H'10 indicates that SCFRDR2 is full of receive data.
Rev. 4.0, 04/00, page 586 of 850
Description
Loopback test disabled
Loopback test enabled
15
14
—
—
0
0
R
R
7
6
—
—
0
0
R
R
13
12
—
T4
0
0
R
R
5
4
—
R4
R3
0
0
R
R
11
10
T3
T2
0
0
R
R
3
2
R2
R1
0
0
R
R
(Initial value)
9
8
T1
T0
0
0
R
R
1
0
R0
0
0
R
R
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