Hitachi SH7750 series Hardware Manual page 300

Bits 8 to 6—Area 1 Wait Control (A1W2–A1W0): These bits specify the number of wait states
to be inserted for area 1.
Bit 8: A1W2 Bit 7: A1W1
0 0
1
1 0
1
Bits 5 to 3—Area 0 Wait Control (A0W2 to A0W0): These bits specify the number of wait
states to be inserted for area 0.
Bit 5: A0W2 Bit 4: A0W1
0 0
1
1 0
1
Bit 6: A1W0 Inserted Wait States
0 0
1 1
0 2
1 3
0 6
1 9
0 12
1 15 (Initial value)
Bit 3: A0W0 Inserted Wait States
0 0
1 1
0 2
1 3
0 6
1 9
0 12
1 15 (Initial value)
Description
5'< Pin 5'<
5'< 5'<
Ignored
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Description
First Cycle
5'< Pin 5'< 5'< 5'<
Ignored
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Rev. 4.0, 04/00, page 289 of 850