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For details, see section 13.2.2, Bus Control Register 2 (BCR2), and section 13.2.6, Memory
Control Register (MCR).
The area 7 address range, H'1C000000 to H'1FFFFFFFF, is a reserved space and must not be used.
13.1.6
PCMCIA Support
The SH7750 Series supports PCMCIA compliant interface specifications for external memory
space areas 5 and 6.
The interfaces supported are the IC memory card interface and I/O card interface stipulated in
JEIDA specifications version 4.2 (PCMCIA2.1).
External memory space areas 5 and 6 support both the IC memory card interface and the I/O card
interface.
The PCMCIA interface is supported only in little-endian mode.
Table 13.4 PCMCIA Interface Features
Item
Access
Data bus
Memory type
Common memory capacity
Attribute memory capacity
Others
Rev. 4.0, 04/00, page 268 of 850
Features
Random access
8/16 bits
Mask ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Max. 64 Mbytes
Max. 64 Mbytes
Dynamic bus sizing for I/O bus width, access to PCMCIA interface
from address translation areas
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