Usb Dma Interrupt Status Register (Usbdmaintst - 0Xe009 0090); Usb Dma Interrupt Enable Register (Usbdmainten - 0Xe009 0094) - Philips LPC214 Series User Manual

Philips Semiconductors
Volume 1
Table 213: USB EP DMA Disable register (USBEpDMADis - address 0xE009 008C) bit
Bit
0
1
31:2 EPxx_DMA_DISABLE

14.8.18 USB DMA Interrupt Status register (USBDMAIntSt - 0xE009 0090)

Bit 0, End_of_Transfer_Interrupt, will be set by hardware if any of the 32 bits in the End Of
Transfer Interrupt Status register is 1. The same logic applies for Bit 1 and 2 of the DMA
Interrupt Status register. The hardware checks the 32 bits of New DD Request Interrupt
Status register to set/clear the bit 1 of DMA Interrupt Status register and similarly the 32
bits of System Error Interrupt Status register to set/clear the bit 2 of DMA Interrupt Status
register. The USBDMAIntSt is a read only register.
Table 214: USB DMA Interrupt Status register (USBDMAIntSt - address 0xE009 0090) bit
Bit
0
1
2
31:3 -

14.8.19 USB DMA Interrupt Enable register (USBDMAIntEn - 0xE009 0094)

Setting the bit in this register will cause external interrupt to happen for the bits set in the
interrupt status register. The USBDMAIntEn is a read/write register.
9397 750 XXXXX
User manual
description
Symbol Value Description
EP0_DMA_DISABLE 0
EP1_DMA_DISABLE 0
0
1
description
Symbol
End_of_Transfer_Interrupt
New_DD_Request_Interrupt
System_Error_Interrupt
Rev. 01 — 15 August 2005
Chapter 14: USB Device Controller
Control endpoint OUT (DMA cannot be enabled for
this endpoint and the EP0_DMA_DISABLE bit value
must be 0).
Control endpoint IN (DMA cannot be enabled for
this endpoint and the EP1_DMA_DISABLE bit value
must be 0).
≤ ≤
Endpoint xx (2 xx 31) DMA disable control bit.
No effect.
Disable the DMA operation for endpoint EPxx.
Value Description
End of Transfer Interrupt bit.
0 All bits in the USBEoTIntSt register are 0.
1 At least one bit in the USBEoTIntSt is set.
New DD Request Interrupt bit.
0 All bits in the USBNDDRIntSt register are 0.
1 At least one bit in the USBNDDRIntSt is set.
System Error Interrupt bit.
0 All bits in the USBSysErrIntSt register are 0.
1 At least one bit in the USBSysErrIntSt is set.
- Reserved, user software should not write
ones to reserved bits. The value read from a
reserved bit is not defined.
UM10139
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset
value
0
0
0
Reset
value
0
0
0
NA
218