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Philips Semiconductors
Volume 1
14.9.11 Select Endpoint/Clear Interrupt (Command: 0x40 - 0x5F, Data: read 1
byte)
Commands 0x40 to 0x5F are identical to their Select Endpoint equivalents, with the
following differences:
14.9.12 Set Endpoint Status (Command: 0x40 - 0x55, Data: write 1 byte
(optional))
The Set Endpoint Status command sets status bits '7:5' and 0 of the endpoint. The
Command Code of Set Endpoint Status is equal to the sum of 0x40 and the physical
endpoint number in hex value. Not all bits can be set for all types of endpoints.
Table 233: Set Endpoint Status Register bit description
Bit Symbol
0
4:1 -
5
6
7
9397 750 XXXXX
User manual
•
They clear the associated interrupt in the USB clock domain only.
•
In case of a control out endpoint, they clear the setup and over-written bits
•
Reading one byte is obligatory.
Value
Description
ST
Stalled endpoint bit. A Stalled control endpoint is automatically
Unstalled when it receives a SETUP token, regardless of the
content of the packet. If the endpoint should stay in its stalled
state, the CPU can un-stall it.
When a stalled endpoint is unstalled - either by the Set Endpoint
Status command or by receiving a SETUP token - it is also
re-initialized. This flushes the buffer: in case of an OUT buffer it
waits for a DATA 0 PID; in case of an IN buffer it writes a DATA 0
PID. There is no change on the interrupt status of the endpoint.
Even when unstalled, setting the stalled bit to 0 initializes the
endpoint. When an endpoint is stalled by the Set Endpoint
Status command it is also re-initialized.
The command to set the conditional stall bit will be ignored if the
'Setup Packet' bit is set (the EP will not be reset and no status
bits will change).
0
The endpoint is unstalled.
1
The endpoint is stalled.
-
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
DA
Disabled endpoint bit.
0
The endpoint is enabled.
1
The endpoint is disabled.
RF_MO
Rate Feedback Mode.
0
Interrupt endpoint is in the Toggle mode.
1
Interrupt endpoint is in the Rate Feedback mode. This means
that transfer takes place without data toggle bit.
CND_ST
Conditional Stall bit.
0
Unstalls both control endpoints.
1
Stall both control endpoints, unless the Setup Packet bit is set. It
is defined only for control OUT endpoints.
Rev. 01 — 15 August 2005
UM10139
Chapter 14: USB Device Controller
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset
value
0
NA
0
0
0
229
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