Power Control For Peripherals Register (Pconp - 0Xe01F Coc4) - Philips LPC214 Series User Manual

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3.9.3 Power Control for Peripherals register (PCONP - 0xE01F COC4)

The PCONP register allows turning off selected peripheral functions for the purpose of
saving power. This is accomplished by gating off the clock source to the specified
peripheral blocks. A few peripheral functions cannot be turned off (i.e. the Watchdog timer,
GPIO, the Pin Connect block, and the System Control block). Some peripherals,
particularly those that include analog functions, may consume power that is not clock
dependent. These peripherals may contain a separate disable control that turns off
User manual
Power Control register (PCON - address 0xE01F COCO) bit description
Symbol
Description
IDL
Idle mode - when 1, this bit causes the processor clock to be stopped,
while on-chip peripherals remain active. Any enabled interrupt from a
peripheral or an external interrupt source will cause the processor to
resume execution.
PD
Power-down mode - when 1, this bit causes the oscillator and all
on-chip clocks to be stopped. A wakeup condition from an external
interrupt can cause the oscillator to restart, the PD bit to be cleared,
and the processor to resume execution.
IMPORTANT: PD bit can be set to 1 at any time if USBWAKE = 0. In
case of USBWAKE = 1, it is possible to set PD to 1 only if
USB_need_clock = 0. Having both USBWAKE and
USB_need_clock equal 1 prevents the microcontroller from
entering Power-down mode. (For additional details see
"Interrupt Wakeup register (INTWAKE - 0xE01F C144)" on page 22
Section 14.7.1 "USB Interrupt Status register (USBIntSt -
0xE01F C1C0)" on page
PDBOD
When PD is 1 and this bit is 0, Brown Out Detection (BOD) remains
operative during Power-down mode, such that its Reset can release the
microcontroller from Power-down mode
both 1, the BOD circuit is disabled during Power-down mode to
conserve power. When PD is 0, the state of this bit has no effect.
BODPDM When this bit is 1, the BOD circuitry will go into power down mode when
chip power down is asserted, resulting in a further reduction in power.
However, the possibility of using BOD as a wakeup source from Power
Down mode will be lost. When this bit is 0, BOD stays active during
Power Down mode.
BOGD
Brown Out Global Disable. When this bit is 1, the BOD circuitry is fully
disabled at all times, and will not consume power. When 0, the BOD
circuitry is enabled.
BORD
Brown Out Reset Disable. When this bit is 1, the second stage of low
voltage detection (2.6 V) will not cause a chip reset. When BORD is 0,
the reset is enabled. The first stage of low voltage detection (2.9 V)
Brown Out interrupt is not affected.
-
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Since execution is delayed until after the Wakeup Timer has allowed the main oscillator to resume stable
operation, there is no guarantee that execution will resume before V
threshold, which prevents execution. If execution does resume, there is no guarantee of how long the
microcontroller will continue execution before the lower BOD threshold terminates execution. These issues
depend on the slope of the decline of V
vicinity of the microcontroller will improve the likelihood that software will be able to do what needs to be
done when power is being lost.
Rev. 01 — 15 August 2005
Chapter 3: System Control Block
200)
[1]
. When PD and this bit are
DD
. High decoupling capacitance (between V
DD
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
UM10139
Reset
value
0
0
Section 3.5.3
and
0
0
0
0
NA
has fallen below the lower BOD
and ground) in the
DD
36

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