Usb Device Interrupt Set Register (Usbdevintset - 0Xe009 000C); Usb Device Interrupt Priority Register (Usbdevintpri - 0Xe009 002C) - Philips LPC214 Series User Manual

Philips Semiconductors
Volume 1
Bit 23
Symbol -
Bit 15
Symbol -
Bit 7
Symbol TxENDPKT
Table 181: USB Device Interrupt Clear register (USBDevIntClr - address 0xE009 0008) bit description
Bit Symbol Value
31:0 See 0
USBDevIntClr
1
bit allocation
table above

14.7.5 USB Device Interrupt Set register (USBDevIntSet - 0xE009 000C)

Setting a particular bit to 1 in this register will set the corresponding bit in the Interrupt
Status register. Writing a 0 will not have any influence. The USBDevIntSet is a write only
register.
Table 182: USB Device Interrupt Set register (USBDevIntSet - address 0xE009 000C) bit allocation
Reset value: 0x0000 0000
Bit 31
Symbol -
Bit 23
Symbol -
Bit 15
Symbol -
Bit 7
Symbol TxENDPKT
Table 183: USB Device Interrupt Set register (USBDevIntSet - address 0xE009 000C) bit description
Bit Symbol Value
31:0 See 0
USBDevIntSet
1
bit allocation
table above

14.7.6 USB Device Interrupt Priority register (USBDevIntPri - 0xE009 002C)

By setting a particular bit to 1, the corresponding interrupt will be routed to the high priority
interrupt line. If the bit is 0 the interrupt will be routed to the low priority interrupt line. Only
one of the EP_FAST or FRAME can be routed to the high priority interrupt line. Setting
both bits at the same time is not allowed. If the software attempts to set both bits to 1,
none of them will be routed to the high priority interrupt line. All enabled endpoint
9397 750 XXXXX
User manual
22 21
- -
14 13
- -
6 5
Rx CDFULL
ENDPKT
Description
No effect.
The corresponding bit in the Device Interrupt Status register
(Section 14.7.2) is cleared.
30 29
- -
22 21
- -
14 13
- -
6 5
Rx CDFULL
ENDPKT
Description
No effect.
The corresponding bit in the Device Interrupt Status register
(Section 14.7.2) is set.
Rev. 01 — 15 August 2005
Chapter 14: USB Device Controller
20 19
- -
12 11
- -
4 3
CCEMTY DEV_STAT
28 27
- -
20 19
- -
12 11
- -
4 3
CCEMTY DEV_STAT
UM10139
18 17
- -
10 9
- EPR_INT
2 1
EP_SLOW EP_FAST
26 25
- -
18 17
- -
10 9
- EPR_INT
2 1
EP_SLOW EP_FAST
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
16
-
8
EP_RLZED
0
FRAME
Reset value
0
24
-
16
-
8
EP_RLZED
0
FRAME
Reset value
0
203