Ep_Ram Requirements - Philips LPC214 Series User Manual

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Philips Semiconductors
Volume 1
{
}
Device will not respond to any tokens to the un-realized endpoint. 'Configure Device'
command can only enable all realized and enabled endpoints. For details see
14.9.2 "Configure Device (Command: 0xD8, Data: write 1 byte)" on page

14.8 EP_RAM requirements

The USB device controller uses dedicated RAM based FIFO (EP_RAM) as an endpoint
buffer. Each endpoint has a reserved space in the EP_RAM. The EP_RAM size
requirement for an endpoint depends on its Maxpacketsize and whether it is double
buffered or not. 32 words of EP_RAM are used by the device for storing the buffer
pointers. The EP_RAM is word aligned but the Maxpacketsize is defined in bytes hence
the RAM depth has to be adjusted to the next word boundary. Also, each buffer has one
word header showing the size of the packet length received.
EP_ RAM size (in words) required for the physical endpoint can be expressed as
EP_RAMsize = ((Maxpacketsize + 3) / 4 + 1) × db_status
where db_status = 1 for single buffered endpoint and 2 for double buffered endpoint.
Since all the realized endpoints occupy EP_RAM space, the total EP_RAM requirement is
where N is the number of realized endpoints. Total EP_RAM size should not exceed 2048
bytes (2 kB, 0.5 kwords).
EP_RAM can be accessed by 3 sources, which are SIE, DMA engine and CPU. Among
them, CPU has the highest priority followed by the SIE and DMA engine. The DMA engine
has got the lowest priority. Then again, under the above mentioned 3 request sources,
write request has got higher priority than read request. Typically, CPU does single word
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User manual
/* OR with the existing value of the register */
RealizeEndpointRegister |= (UInt32) ((0x1 << endpt));
/* Load endpoint index Reg with physical endpoint no.*/
EndpointIndexRegister = (UInt32) endpointnumber;
/* load the max packet size Register */
Endpoint MaxPacketSizeReg = PacketSize;
/* check whether the EP_RLSED bit is set */
while (!(DeviceInterruptStatusReg & PFL_HW_EP_RLSED_BIT))
{
/* wait till endpoint realization is complete */
}
/* Clear the EP_RLSED bit */
Clear EP_RLSED bit in DeviceInterrupt Status Reg;
TotalEPRAMsize
Rev. 01 — 15 August 2005
Chapter 14: USB Device Controller
N
epramsize n ( )
=
32
+
n
=
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
UM10139
Section
223.
209

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