Uart1 Interrupt Identification Register (U1Iir - 0Xe001 0008, Read Only) - Philips LPC214 Series User Manual

Philips Semiconductors
Volume 1
Table 120: UART1 Interrupt Enable Register (U1IER - address 0xE001 0004, when DLAB = 0)
Bit
6:4
7
8
9
31:10
[1]
10.3.7 UART1 Interrupt Identification Register (U1IIR - 0xE001 0008, Read
Only)
The U1IIR provides a status code that denotes the priority and source of a pending
interrupt. The interrupts are frozen during an U1IIR access. If an interrupt occurs during
an U1IIR access, the interrupt is recorded for the next U1IIR access.
Table 121: UART1 Interrupt Identification Register (U1IIR - address 0xE001 0008, read only)
Bit
0
User manual
bit description
Symbol Value
- -
CTS
Interrupt
[1]
Enable
0
1
ABTOIntEn
0
1
ABEOIntEn
0
1
- -
Available in LPC2144/6/8 only. In all other LPC214x parts this bit is Reserved.
bit description
Symbol Value
Interrupt
Pending
0
1
Rev. 01 — 15 August 2005
Description
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
If auto-CTS mode is enabled this bit
enables/disables the modem status interrupt
generation on a CTS1 signal transition. If auto-CTS
mode is disabled a CTS1 transition will generate an
interrupt if Modem Status Interrupt Enable
(U1IER[3]) is set.
In normal operation a CTS1 signal transition will
generate a Modem Status Interrupt unless the
interrupt has been disabled by clearing the
U1IER[3] bit in the U1IER register. In auto-CTS
mode a transition on the CTS1 bit will trigger an
interrupt only if both the U1IER[3] and U1IER[7] bits
are set.
Disable the CTS interrupt.
Enable the CTS interrupt.
U1IER8 enables the auto-baud time-out interrupt.
Disable Auto-baud Time-out Interrupt.
Enable Auto-baud Time-out Interrupt.
U1IER9 enables the end of auto-baud interrupt.
Disable End of Auto-baud Interrupt.
Enable End of Auto-baud Interrupt.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Description
Note that U1IIR[0] is active low. The pending
interrupt can be determined by evaluating
U1IIR[3:1].
At least one interrupt is pending.
No interrupt is pending.
UM10139
Chapter 10: UART1
Reset value
NA
0
0
0
NA
Reset value
1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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