Cisco D9824 Installation And Configuration Manual page 341

Alarm Message
Type
FPGA status Set
FPGA status Set
FPGA status Set
FPGA status Set
FPGA status Clear
MPoIP Engine Set
Failure
MPoIP Engine Clear
Failure
Message Cause/Remedy
FPGA Done failed Cause: Hardware
to go high issue.
Remedy: Clear
alarms, reset the
unit, notify Cisco
Services if the
problem persists.
SW ver outside Cause: Hardware
upper or lower
issue.
limit
Remedy: Clear
alarms, reset the
unit, notify Cisco
Services if the
problem persists.
FPGA ID does not Cause: Hardware
match FPGA
issue.
DESIGNATION
Remedy: Clear
alarms, reset the
unit, notify Cisco
Services if the
problem persists.
FPGA ID does not Cause: Hardware
match HW FPGA
issue.
ID
Remedy: Clear
alarms, reset the
unit, notify Cisco
Services if the
problem persists.
FPGA loaded –
successfully and
reset
Critical MPoIP Cause: MPEG over
engine failure, all
IP engine failure.
active streams
Remedy: Restart
must be restarted
all the streams.
Error cleared –
Description Severity
FPGA setup Major
failure or the
FPGA binary
identity does
not match the
FPGA registers.
FPGA setup Major
failure or the
FPGA binary
identity does
not match the
FPGA registers.
FPGA setup Major
failure or the
FPGA binary
identity does
not match the
FPGA registers.
FPGA setup Major
failure or the
FPGA binary
identity does
not match the
FPGA registers.
– Major
Indicates that Major
MPoIP delay
FIFO is
overflowing.
This is a critical
error.
– Major
ID
39000
39000
39000
39000
39000
92200
92200
319