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58 PCIE-5565PIORC Reflective Memory Board
3.3.9 Network Interrupt Command Register
Network Interrupt Command (NIC) BAR2 (Offset $1D): An 8‐bit register
containing a four‐bit code that defines the type of network interrupt issued. See
Table 3‐55 on page 58 for a definition of the possible codes. The NIC is both read
and write accessible. Only writing to the NIC register will initiate the network
interrupt. The network interrupt is transmitted in order following after all
previously written data.
Table 3-55 Network Interrupt Command Register
NIC[3,2,1,0]
Function
X000
Reset Node Request (sets LISR Bit 03 only, the user application must perform the
actual reset)
X001
Network Interrupt 1 (stored in a 127 deep FIFO at the receiving node)
X010
Network Interrupt 2 (stored in a 127 deep FIFO at the receiving node)
X011
Network Interrupt 3 (stored in a 127 deep FIFO at the receiving node)
X100
Reserved (Setting to this type will only set the OWN DATA bit in the LCSR1)
X101
Reserved (Setting to this type will only set the OWN DATA bit in the LCSR1)
X110
Reserved (Setting to this type will only set the OWN DATA bit in the LCSR1)
X111
Network Interrupt 4 (stored in a 127 deep FIFO at the receiving node)
1XXX
Global enable. Send to all nodes regardless of NTN Register
The NTD, NTN and the NIC registers described above are used to generate
network interrupts. Four pairs of registers described below are involved with
receiving those network interrupts.
3.3.10 Interrupt 1 Sender Data FIFO
Interrupt 1 Sender Data FIFO (ISD1) BAR2 (Offset $20): A 32‐bit FIFO containing
up to 127 Dwords of data, which has been sent to this node in type 1 network
interrupt packets. The function of the 32 bits of data is user defined. The ISD1 is a
127 location deep FIFO, but it is coupled and slaved to the companion FIFO SID1.
Essentially, there is only one address pointer for both FIFOs and that pointer is
only affected by access to the SID1 FIFO. For this reason, each location within the
data (ISD1) FIFO can be read multiple times without incrementing the address
pointer, while reading the companion SID1 FIFO increments the pointer for both
FIFOs. For this same reason, the user must read the data (ISD1) before the Sender
ID (SID1) or the corresponding data will be lost.
3.3.11 Interrupt 1 Sender ID FIFO
Interrupt 1 Sender ID FIFO (SID1) BAR2 (Offset $24): An 8‐bit FIFO containing the
Node ID corresponding to the data in ISD1. Each time one node issues a network
interrupt, it includes its own node ID as part of the packet. At each other network
node, the interrupt packet is evaluated. If the network interrupt is directed to that
node, and if the network interrupt is of type 1, then the sender's node ID is stored
in a 127 location deep FIFO called the Interrupt 1 Sender ID FIFO or SID1. Like
any normal FIFO, each time the SID1 is read, the FIFO address pointer
automatically increments to the next location in the FIFO. Therefore, each sender
ID can only be read once from the SID1 FIFO. Writing any data to the SID1 FIFO
causes the SID1 FIFO to be set to empty. Note that the value of zero is NOT a true
indicator that the FIFO is empty since zero is also a valid node ID. To see if
NIC: BAR2 Offset $1D
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