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Table 3-12 Pci Base Address Register 1 For Access To Local Configuration Registers; Table 3-13 Pci Base Address Register 2 For Access To Rfm Control And Status Registers - GE PCIE-5565PIORC* Hardware Reference Manual

Ultrahigh speed fiber-optic reflective memory with interrupts
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PCI Base Address Register 1 contains the starting address for I/O mapped 
accesses to Local Configuration Registers. The value in this register is loaded by 
the system BIOS.

Table 3-12 PCI Base Address Register 1 for Access to Local Configuration Registers

Bit
Description
0
Memory Space Indicator.
A zero (0) indicates the register maps into Memory Space.
A one (1) indicates the register maps into I/O Space.
(NOTE: Hardcoded to one (1).)
1
Reserved.
7:2
I/O Base Address. Base Address for I/O access to Local
Configuration registers (requires 256 bytes).
(NOTE: Hardcoded to $0.)
31:8
I/O Base Address. I/O Base Address for access to Local
Configuration registers.
*NOTE: This register will be altered by the system BIOS during the system boot process. I/O Accesses not supported.
PCI Base Address Register 2 contains the starting address for memory mapped 
accesses to the RFM Control and Status Registers. The value in this register is 
loaded by the system BIOS. 

Table 3-13 PCI Base Address Register 2 for Access to RFM Control and Status Registers

Bit
Description
0
Memory Space Indicator.
A zero (0) indicates the register maps into Memory Space.
A one (1) indicates the register maps into I/O Space.
2:1
Register Location. Values:
00 - Locate anywhere in 32-bit Memory Address Space.
01 - Locate below 1 MByte Memory Address Space.
10 - Locate anywhere in 64-bit Memory Address Space.
11 - Reserved
If I/O Space, Bit 1 is always 0 and Bit 2 is included in the base
address.
3
Prefetchable (If Memory Space).
A one (1) indicates there are no side effects on reads.
If I/O Space, Bit 3 is included in the base address.
7:4
Memory Base Address bits hardwired to zero for 256 bytes.
31:8
Memory Base Address. Memory Base Address for access to
RFM registers.
*NOTE: This register will be altered by the system BIOS during the system boot process.
PCIBAR1: Offset $14
Read
Yes
Yes
Yes
Yes
PCIBAR2: Offset $18
Read
Yes
Yes
Yes
Yes
Yes
*Value after
Write
PCI Reset
No
1
No
0
No
$0
Yes
$0
*Value after
Write
PCI Reset
No
0
Mem: No I/O:
00
Bit 1 no,
Bit 2 yes
Mem: No I/O:
0
Yes
No
0000
Yes
$0
Programming 35
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