Table 3-41 Pci Core/Features Revision Id; Table 3-42 Dma Channel 0 Mode Register; Table 3-43 Dma Channel 0 Pci Address Register; Table 3-44 Dma Channel 0 Local Address Register - GE PCIE-5565PIORC* Hardware Reference Manual

46 PCIE-5565PIORC Reflective Memory Board

Table 3-41 PCI Core/Features Revision ID

Bits Description
7:0 PCI Core/Features Revision ID. This value is read by the
RFM-5565 driver to determine the features of this board.

Table 3-42 DMA Channel 0 Mode Register

Bit Description
1:0 Local Bus Width. An 11 indicates a 32-bit bus width.
6:2 Reserved
7 Continuous Burst Enable. A one (1) enables Continuous Burst
mode.
8 Local Burst Enable. A one (1) indicates Local Bursting.
9 Scatter-Gather Mode. Writing one (1) indicates DMA Scatter-
Gather mode is enabled. For Scatter-Gather mode, the DMA
descriptors are loaded from memory in PCI Address space.
Writing zero (0) indicates DMA Block mode is enabled.
10 Done Interrupt Enable. A one (1) enables an interrupt when done. Yes
16:11 Reserved
17 DMA Channel 0 Interrupt Select. A one (1) routes the DMA
Channel 0 interrupt to the PCI bus interrupt.
31:18 Reserved

Table 3-43 DMA Channel 0 PCI Address Register

Bits Description
31:0 PCI Address Register. Indicates from where in PCI
Memory space DMA transfers (read or write) start.

Table 3-44 DMA Channel 0 Local Address Register

Bits Description
31:0 Local Address Register. Indicates from where in Local
Memory space DMA transfers (read or write) start.
PCIHREV: BAR0/1 Offset $74
Read
Yes
DMAMODE0: BAR0/1 Offset $80
DMAPADR0: BAR0/1 Offset $84
Read
Yes
DMALADR0: BAR0/1 Offset $88
Read
Yes
Value after
Write
PCI Reset
No Current Rev#
Value after
Read Write
PCI Reset
Yes No 11
Yes No $00
Yes No 1
Yes No 1
Yes Yes 0
No 1
Yes No $00
Yes No 1
Yes No $00
Value after
Write
PCI Reset
Yes $0
Value after
Write
PCI Reset
Yes $0