Interrupt Circuits - GE PCIE-5565PIORC* Hardware Reference Manual

2.5 Interrupt Circuits

The RFM‐5565 has a single interrupt output (INTA#). One or more events on the
RFM‐5565 board can cause the interrupt. The sources of the interrupt can be
individually enabled and monitored through several registers.
The interrupt circuitry of the RFM‐5565 is arranged in two tiers. The primary tier
of interrupts is enabled and monitored by the Local Configuration Register's
INTCSR at offset $68. The sources for monitoring the primary tier interrupts
include:
1. DMA Ch 0 Done
2. Local Interrupt Input (LINTi#)
The primary tier interrupt source (1) is used during DMA cycles and must be
configured in the DMA registers.
The other primary tier interrupt source (2) is the Local Interrupt Input (LINTi#).
All secondary tier interrupts are funneled through the LINTi#. Second tier
interrupts include several operational status bits, faults, and network interrupts.
The second tier interrupts are selected and monitored through the two RFM
Control and Status Registers referred to as the Local Interrupt Status Register
(LISR) and the Local Interrupt Enable Register (LIER). For a detailed description
of these two registers refer to Chapter 3, Programming, on page 29. A block
diagram of the main interrupt circuitry is shown in Figure 2‐1 on page 26 .
Theory of Operation 25