Theory Of Operation; Basic Operation; Front Bezel Led Indicators - GE PCIE-5565PIORC* Hardware Reference Manual

2 • Theory of Operation

2.1 Basic Operation

2.2 Front Bezel LED Indicators

The following sections describe the functionality of the RFM‐5565 Reflective
Memory board. A description of the major sub‐circuits and their operation is
included. This section will also occasionally mention Control and Status registers
related to operations. To see a detailed description of these Control and Status
registers please refer to Chapter 3, Programming, on page 29 of this manual.
Each RFM‐5565 node (any 5565 Reflective Memory board) in the network is
interconnected using fiber‐optic cables in a daisy chain loop. The transmitter of
the first board must be connected to the receiver of the second board. The
transmitter of the second board is connected to the receiver of the third, and so on,
until the loop is completed back at the receiver of the first board. Alternatively,
any node can be connected to the ring network using one or more ACC‐5595*
Reflective Memory Hubs. It is important that the ring network be complete (i.e.,
every receiver and transmitter must be connected). The RFM‐5565 will not
transmit packets if the receiver does not detect a signal or it has lost
synchronization (e.g., the cable is damaged). Each node must have a unique node
ID, which is set using switch S2 (i.e. no two nodes should have the same node ID).
The order of the node IDs is unimportant.
A transfer of data over the network is initiated by a write to onboard SDRAM
from the host system. The write can be as simple as a PIO target write, or it can be
due to a DMA cycle by the resident DMA engine.
While the write to the SDRAM is occurring, circuitry on the RFM‐5565
automatically writes the data and other pertinent information into the transmit
FIFO. From the transmit FIFO, the transmit circuit retrieves the data and puts it
into a variable length packet of 4 to 64 bytes that is transmitted over the fiber‐optic
interface to the receiver of the next board.
The receiver then checks the packet for errors. When the error free data is
received, the receive circuit opens the packet and stores the data in the board's
receive FIFO. From the receive FIFO, another circuit writes the data into the local
onboard SDRAM at the same relative location in memory as the originating node.
This circuit also simultaneously routes the data into the board's own transmit
FIFO. From there, the process is repeated until the data returns to the receiver of
the originating node. At the originating node, the data packet is removed from the
network.
The RFM‐5565 has three LED indicators located on the bezel. The top red LED is a
status indicator; its power up default state is ON. The status LED may be toggled
OFF or ON by writing to Bit 31 of the LCSR1 register, which indicates a user
defined board status. The middle yellow LED is the signal detect indicator. The
signal detect LED turns ON if the receiver detects light. It can be used as a simple
method of checking that the optical network is properly connected to the receiver.
The bottom green LED is the OWN DATA indicator. When a board detects its own
data returning on the network, it turns this LED ON.

Theory of Operation 23