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5.6.4
Programmable address wait function
Address-setup or address-hold waits to be inserted in each bus cycle can be set by using the address wait control
register (AWC). Address wait insertion is set for each chip select area (CS0 to CS3).
If an address setup wait is inserted, it seems that the high-clock period of T1 state is extended by 1 clock. If an
address hold wait is inserted, it seems that the low-clock period of T1 state is extended by 1 clock.
(1) Address wait control register (AWC)
This register can be read or written in 16-bit units.
After reset:
AWC
AHW3
CSn signal
AHWn
ASWn
Caution Be sure to set bits 15 to 8 to 1.
194
CHAPTER 5 BUS CONTROL FUNCTION
FFFFH
R/W
Address:
15
14
13
1
1
1
7
6
5
ASW3
AHW2
CS3
CS2
Specifies insertion of address hold wait (n = 0 to 3)
0
Not inserted
1
Inserted
Specifies insertion of address setup wait (n = 0 to 3)
0
Not inserted
1
Inserted
Preliminary User's Manual U15905EJ1V0UD
FFFFF488H
12
11
10
1
1
1
4
3
2
ASW2
AHW1
ASW1
CS1
9
8
1
1
1
0
AHW0
ASW0
CS0
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