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12.4.1 Configuration
2
I
C includes the following hardware.
Registers
Control registers
(1) IIC shift register (IIC)
The IIC register is used to convert 8-bit serial data to 8-bit parallel data and to convert 8-bit parallel data to 8-
bit serial data. The IIC register can be used for both transmission and reception.
Write and read operations to the IIC register are used to control the actual transmit and receive operations.
IIC is set by an 8-bit memory manipulation instruction.
RESET input clears the IIC register to 00H.
(2) Slave address register (SVA)
The SVA register sets local addresses when in slave mode.
The SVA register is set by an 8-bit memory manipulation instruction.
RESET input clears the SVA register to 00H.
(3) SO latch
The SO latch is used to retain the SDA pin's output level.
(4) Wake-up controller
This circuit generates an interrupt request when the address received by this register matches the address
value set to slave address register (SVA) or when an extension code is received.
(5) Clock selector
This selects the sampling clock to be used.
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CHAPTER 12 SERIAL INTERFACE FUNCTION
Table 12-5. Configuration of I
Item
IIC shift register (IIC)
Slave address register (SVA)
IIC control register (IICC)
IIC status register (IICS)
IIC clock selection register (IICCL)
IIC clock expansion register (IICCE)
IICC function expansion register (IICX)
Preliminary User's Manual U15905EJ1V0UD
2
C
Configuration
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