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TIn
Note 1
Count clock
3
TCLn2 TCLn1 TCLn0
Timer clock selection
register n (TCLn)
Notes 1. The count clock is set by the TCLn register.
2. Serial interface clock (TM4, TM5 only)
Remarks 1. "
" are signals that can be directly connected to ports.
2. n = 2 to 5, m = 3, 5
7.2.2
Configuration of 8-bit timer/event counter n
8-bit timer/event counter n consists of the following hardware (n = 2 to 5).
Item
Timer registers
Registers
Timer output
490
Control registers
Note When using the functions of the TIn and TOn pins, refer to Table 4-18 Using Port Pins for Alternate
Function.
244
CHAPTER 7 TIMER/COUNTER FUNCTION
Figure 7-17. Block Diagram of 8-Bit Timer/Event Counter n
8-bit timer compare
register n (CRn)
Match
8-bit timer
OVF
counter n
(TMn)
Clear
Selector
TCEn TMCn6 TMCm4 LVSn LVRn TMCn1 TOEn
Table 7-3. Configuration of 8-Bit Timer/Event Counter n
8-bit timer counters 2 to 5 (TM2 to TM5)
16-bit timer counters 23 and 45 (TM23, TM45): Only when using cascade connection
8-bit timer compare registers 2 to 5 (CR2 to CR5)
16-bit timer compare registers 23 and 45 (CR23, CR45): Only when using cascade connection
TO2 to TO5
Timer clock selection registers 2 to 5 (TCL2 to TCL5)
Timer clock selection registers 23 and 45 (TCL23, TCL45): Only when using cascade connection
8-bit timer mode control registers 2 to 5 (TMC2 to TMC5)
16-bit timer mode control registers 23 and 45 (TMC23, TMC45): Only when using cascade
connection
Preliminary User's Manual U15905EJ1V0UD
Internal bus
Selector
S
Q
INV
R
S
Invert
Q
level
R
8-bit timer mode control
register n (TMCn)
Internal bus
Configuration
INTTMn
Note 2
TOn
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