Precautions; Interrupt Factors - NEC V850ES/SA2 UPD703201 Manual

32-bit single-chip microcontrollers
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13.11 Precautions

(1) Memory boundary
The transfer operation is not guaranteed if the source or the destination address exceeds the area of DMA
objects (external memory, internal RAM, or peripheral I/O) during DMA transfer.
(2) Transfer of misaligned data
DMA transfer of 16-bit bus width misaligned data is not supported.
(3) Times related to DMA transfer
The overhead before and after DMA transfer and the minimum execution clock for DMA transfer are shown
below.
• Internal RAM access: 2 clocks
Note that for external memory access, the time depends on the type of external memory connected.
(4) Bus arbitration for CPU
The CPU can access external memory, on-chip peripheral I/O, and internal RAM not undergoing DMA transfer.
While data transfer among external memories or to and from I/O is being performed, the CPU can access
internal RAM.
While data transfer is being executed between internal RAMs, the CPU can access external memory and
peripheral I/O.

13.11.1 Interrupt factors

DMA transfer is interrupted if a bus hold is issued.
If the factor (bus hold) interrupting DMA transfer disappears, DMA transfer promptly restarts.
CHAPTER 13 DMA FUNCTIONS (DMA CONTROLLER)
Preliminary User's Manual U15905EJ1V0UD
417

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