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9.4.3
Oscillation stabilization time selection function
The wait time until the oscillation stabilizes after the STOP mode is released is controlled by the oscillation
stabilization time register (OSTS).
The OSTS register is set by an 8-bit memory manipulation instruction.
RESET input sets OSTS to 04H.
After reset:
OSTS
OSTS2
Cautions 1. The wait time following release of the software STOP mode does not include the time until
the clock oscillation starts ("a" in the figure below) following release of the software STOP
mode, regardless of whether the STOP mode is released through RESET input or the
occurrence of an interrupt request signal.
2. Be sure to set bits 3 to 7 to 0.
3. Set the oscillation stabilization time to 1.5 ms or longer.
4. The oscillation stabilization time following reset release is 2
of the OSTS register = 04H).
Remark
f
= Main clock frequency
X
280
CHAPTER 9 WATCHDOG TIMER FUNCTIONS
04H
R/W
Address:
FFFFF6C0H
0
0
0
OSTS1
OSTS0
0
0
0
2
0
0
1
2
0
1
0
2
0
1
1
2
1
0
0
2
1
0
1
2
1
1
0
2
1
1
1
2
Voltage waveform of X1 pin
V
SS
Preliminary User's Manual U15905EJ1V0UD
0
0
OSTS2
Selection of oscillation stabilization time
f
17 MHz
13.5 MHz
14
/f
Setting prohibited
Setting prohibited
X
16
/f
3.855 ms
4.855 ms
X
17
/f
7.710 ms
9.709 ms
X
18
/f
15.42 ms
19.42 ms
X
19
38.84 ms
/f
30.84 ms
X
20
/f
61.68 ms
77.67 ms
X
21
/f
123.4 ms
155.3 ms
X
22
310.7 ms
/f
246.7 ms
X
STOP mode release
a
OSTS1
OSTS0
X
8 MHz
2.048 ms
8.192 ms
16.38 ms
32.77 ms
65.54 ms
131.1 ms
262.1 ms
524.3 ms
19
/f
(because the initial value
X
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