Correction Control Register (Corcn); Rom Correction Operation And Program Flow - NEC V850ES/SA2 UPD703201 Manual

32-bit single-chip microcontrollers
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17.2.2 Correction control register (CORCN)

This register disables or enables the correction operation of correction address register n (CORADn) (n = 0 to 3).
Each channel can be enabled or disabled by this register.
This register is set by using an 8-bit or 1-bit memory manipulation instruction.
After reset:
CORCN
CORENn
Remark
n = 0 to 3
Table 17-1. Correspondence Between CORCN Register Bits and CORADn Registers
COREN3
COREN2
COREN1
COREN0

17.3 ROM Correction Operation and Program Flow

<1> If the address to be corrected and the fetch address of the internal ROM match, the fetch code is replaced by
the DBTRAP instruction.
<2> When the DBTRAP instruction is executed, execution branches to address 00000060H.
<3> Software processing after branching causes the result of ROM correction to be judged (the fetch address and
ROM correction operation are confirmed) and execution to branch to the correction software.
<4> After the correction software has been executed, the return address is set, and return processing is started
by the DBRET instruction.
Cautions 1. The software that performs <3> and <4> must be executed in the internal ROM/RAM.
2. Develop the program so that the ROM correction function is not used until data has been
completely written to the CORCN register that controls ROM correction.
3. When setting an address to be corrected to the CORADn register, clear the higher bits to 0 in
accordance with the capacity of the internal ROM.
4. The ROM correction function cannot be used to correct the data of the internal ROM. It can
only be used to correct instruction codes. If ROM correction is used to correct data, that data
is replaced with the DBTRAP instruction code.
CHAPTER 17 ROM CORRECTION FUNCTION
00H
R/W
Address:
FFFFF880H
0
0
0
Enables/disables correction operation
0
Disabled
1
Enabled
CORCN Register Bit
Preliminary User's Manual U15905EJ1V0UD
<3>
<2>
0
COREN3 COREN2 COREN1 COREN0
Corresponding CORADn Register
CORAD3
CORAD2
CORAD1
CORAD0
<1>
<0>
473

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