Cautions - NEC V850ES/SA2 UPD703201 Manual

32-bit single-chip microcontrollers
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(5) Transfer rate during continuous transmission
During continuous transmission, the transfer rate from a stop bit to the next start bit is extended two clocks of
the base clock (Clock) longer than normal. However, on the reception side, the transfer result is not affected
since the timing is initialized by the detection of the start bit.
Figure 12-16. Transfer Rate During Continuous Transmission
Start bit
FL
Representing the 1-bit data length by FL, the stop bit length by FLstp, and the base clock frequency by f
yields the following equation.
FLstp = FL + 2/f
Therefore, the transfer rate during continuous transmission is as follows.
Transfer rate = 11 × FL = 2/f

12.2.7 Cautions

Cautions to be observed when using UARTn are shown below.
(1) When the supply of clocks to UARTn is stopped (for example, in IDLE or STOP mode), operation stops with
each register retaining the value it had immediately before the supply of clocks was stopped. The TXDn pin
output also holds and outputs the value it had immediately before the supply of clocks was stopped. However,
operation is not guaranteed after the supply of clocks is restarted. Therefore, after the supply of clocks is
restarted, the circuits should be initialized by setting UARTCAEn = 0, RXEn = 0, and TXEn = 0 in the ASIMn
register.
(2) UARTn has a 2-stage buffer configuration consisting of transmit buffer register n (TXBn) and the transmit shift
register, and has status flags (the TXBFn and TXSFn bits of the ASIFn register) that indicate the status of each
buffer. If the TXBFn and TXSFn bits are read in continuous transmission, the value changes from 10 to 01, but
since this change timing is in the period in which data is shifted from TXBn to the transmit shift register, 11 or
00 may be read, depending on the timing. Thus, read only the TXBFn bit during continuous transmission.
CHAPTER 12 SERIAL INTERFACE FUNCTION
1 data frame
Bit 0
Bit 1
FL
FL
CLK
CLK
Preliminary User's Manual U15905EJ1V0UD
Bit 7
Parity bit
Stop bit
FL
FL
FLstp
Start bit of
second byte
Start bit
Bit 0
FL
FL
329
CLK

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