Dma Addressing Control Registers 0 To 3 (Dadc0 To Dadc3) - NEC V850ES/SA2 UPD703201 Manual

13.3.4 DMA addressing control registers 0 to 3 (DADC0 to DADC3)

These 16-bit registers are used to control the DMA transfer mode for DMA channel n (n = 0 to 3). These registers
cannot be accessed during DMA operation.
They can be read or written in 16-bit units.
After reset:
DADCn
(n = 0 to 3)
408
CHAPTER 13 DMA FUNCTIONS (DMA CONTROLLER)
0000H R/W Address:
15 14 13
0 DS0 0
7 6 5
SAD1 SAD0 DAD1
Setting of transfer data size for DMA transfer
DS0
0 8 bits
1 16 bits
SAD1 SAD0 Setting of count direction of the source address for DMA channel n
0 0 Increment
0 1 Decrement
1 0
Fixed
1 1
Setting prohibited
DAD1 DAD0 Setting of count direction of the destination address for DMA channel n
0 0 Increment
0 1
Decrement
1 0
Fixed
1 1
Setting prohibited
Preliminary User's Manual U15905EJ1V0UD
DADC0: FFFFF0D0H, DADC1: FFFFF0D2H,
DADC2: FFFFF0D4H, DADC3: FFFFF0D6H
12 11 10
0 0 0
4 3 2
DAD0 0 0
9 8
0 0
1 0
0 0