Xilinx Virtex-7 FPGA VC7222 Getting Started Manual page 70

12. When the Bitstream Generation Completed dialog window appears, click Cancel
(Figure 3-13).
X-Ref Target - Figure 3-13
13. The generated bitstream is located in the following directory:
..\ibert_7series_gtz_0\ibert_7series_gtz_0_example\ibert_7series
_gtz_0_example.runs\impl_1
VC7222 IBERT Getting Started Guide
UG971 (Vivado Design Suite v2015.1) April 27, 2015
Figure 3-13: Bitstream Generation Completed
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Chapter 3: Creating the GTZ IBERT Core
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