Xilinx Virtex-7 FPGA VC7222 Getting Started Manual page 31

GTZ Transceiver Clock Connection
Connect the GTZ reference clock CLK0 to the SuperClock-2 module as follows (see
Figure 1-23):
J56 (REFCLK0_P) SMA connector → J7 (CLKOUT2_P) on the SuperClock-2 module
J57 (REFCLK0_N) SMA connector → J8 (CLKOUT2_N) on the SuperClock-2 module
Any one of the five differential outputs from the SuperClock-2 module can be used to source
Note:
the GTZ reference clock. CLKOUT1 is used here as an example.
GTZ reference clock CLK1 (J46 and J47) can be left disconnected.
Note:
X-Ref Target - Figure 1-23
VC7222 IBERT Getting Started Guide
UG971 (Vivado Design Suite v2015.1) April 27, 2015
Figure 1-23: GTZ CLK0 and CLK1 Connection
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Chapter 1: VC7222 IBERT Getting Started Guide
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