Xilinx Virtex-7 FPGA VC7222 Getting Started Manual page 58

18. When the Bitstream Generation Completed dialog window appears, click Cancel
(Figure 2-16).
X-Ref Target - Figure 2-16
19. The generated bitstream is located in the following directory:
..\ibert_7series_gtz_0\ibert_7series_gtz_0_example\ibert_7series
_gtz_0_example.runs\impl_1
VC7222 IBERT Getting Started Guide
UG971 (Vivado Design Suite v2015.1) April 27, 2015
Figure 2-16: Bitstream Generation Completed
www.xilinx.com
Chapter 2: Creating the GTH IBERT Core
Send Feedback
58