Tick Timer 1 Control Register; Prescaler Counter - Motorola MVME162FX Programmer's Reference Manual

VMEchip2

Tick Timer 1 Control Register

2
ADR/SIZ
BIT
NAME
OPER
RESET

Prescaler Counter

ADR/SIZ
BIT
NAME
OPER
RESET
2-76
7 6
OVF
R
0 PS
EN When this bit is high, the counter increments. When
this bit is low, the counter does not increment.
COC When this bit is high, the counter is reset to zero
when it compares with the compare register. When
this bit is low, the counter is not reset.
The overflow counter is cleared when a one is
COVF
written to this bit.
OVF These bits are the output of the overflow counter.
The overflow counter is incremented each time the
tick timer sends an interrupt to the local bus
interrupter. The overflow counter can be cleared by
writing a one to the COVF bit.
31
The VMEchip2 has a 32-bit prescaler that provides the clocks
required by the various timers in the chip. Access to the prescaler is
provided for test purposes. The counter is described here because it
may be useful in other applications. The lower 8 bits of the prescaler
counter increment to $FF at the local bus clock rate and then they
are loaded from the prescaler adjust register. When the load occurs,
the upper 24 bits are incremented. When the prescaler adjust
register is correctly programmed, the lower 8 bits increment at the
local bus clock rate and the upper 24 bits increment every
microsecond. The counter may be read at any time.
$FFF40060 (8 bits of 32)
5 4 3
$FFF40064 (32 bits)
. . .
Prescaler Counter
R/W
0 P
2 1 0
COVF COC EN
C R/W R/W
0 PS 0 PS 0 PS
0