Programming The Gcsr - Motorola MVME162FX Programmer's Reference Manual

Programming the GCSR

A complete description of the GCSR is provided in the following
tables. Each register definition includes a table with five lines.
asserted, a local bus cycle may be aborted. The
VMEchip2 is connected to both the local bus and the
VMEbus and if the aborted cycle is bound for the
VMEbus, erratic operation may result. Communications
between the local processor and a VMEbus master
should use interrupts or mailbox locations; reset
should not be used in normal communications. Reset
should be used only when the local processor is halted
or the local bus is hung and reset is the last resort.
Line 1 is the base address of the register as viewed from the
local bus and as viewed from the VMEbus, and the number of
bits defined in the table.
Line 2 shows the bits defined by this table.
Line 3 defines the name of the register or the name of the bits
in the register.
Line 4 defines the operations possible on the register bits as
follows:
This bit is a read-only status bit.
R
R/W This bit is readable and writable.
S/R Writing a one to this bit sets it. Reading it returns its
current status.
Line 5 defines the state of the bit following a reset as defined
below:
P This bit is affected by power-up reset.
S The bit is affected by SYSRESET.
L The bit is affected by local bus reset.
The bit is not affected by reset.
X
GCSR Programming Model
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