Interrupt Level Register 1 (bits 16-23)
ADR/SIZ
BIT
23
NAME
OPER
RESET
This register is used to define the level of the SYSFAIL interrupt and
the master write post bus error interrupt.
WPE LEVEL These bits define the level of the master write post
SYSF LEVEL These bits define the level of the SYSFAIL interrupt.
Interrupt Level Register 1 (bits 8-15)
ADR/SIZ
15
BIT
NAME
OPER
RESET
This register is used to define the level of the VMEbus IRQ1
edge-sensitive interrupt and the level of the external (parity error)
interrupt.
IRQ1E LEVEL These bits define the level of the VMEbus IRQ1
PE LEVEL
$FFF40078 (8 bits [6 used] of 32)
22
21
20
SYSF LEVEL
R/W
0 PSL
bus error interrupt.
$FFF40078 (8 bits [6 used] of 32)
14
13
12
PE LEVEL
R/W
0 PSL
edge-sensitive interrupt.
Not used on MVME162FX
LCSR Programming Model
19
18
17
WPE LEVEL
R/W
0 PSL
11
10
9
IRQ1E LEVEL
R/W
0 PSL
2
16
8
2-91