Mc68040-Bus Master Support For 82596Ca - Motorola MVME162FX Programmer's Reference Manual

MC2 Chip
3

MC68040-Bus Master Support for 82596CA

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MPU Port access enables the MPU to write to an internal, 32-bit
82596CA command register. This allows the MPU to do four things:
1. Write an alternate System Configuration Pointer address.
2. Write an alternative dump area pointer and perform a dump.
3. Execute a software reset.
4. Execute a selftest.
Each Port access must consist of two 16-bit writes: Upper
Command Word (two bytes) and Lower Command Word (two
bytes). The Upper Command Word (two bytes) is mapped at
$FFF46000 and the Lower Command Word (two bytes) is mapped
at $FFF46002.
The MC2 chip only supports (decodes) MPU Port writes. It does not
decode MPU Port reads. (Nor does the 82596CA support MPU Port
reads.)
MPU Channel Attention access is used to cause the 82596CA to
begin executing memory resident Command blocks. To execute an
MPU Channel Attention, the MC68040-bus master performs a
simple read or write to address $FFF46004.
The 82596CA has DMA capability with an Intel i486-bus interface.
When it is the local bus master, external hardware is needed to
convert its bus cycles into MC68040-bus cycles. When the 82596CA
has local bus mastership, the MC2 chip drives the following
MC68040 signal lines:
Snoop Control SC1-SC0 (with the value programmed into the
LAN Interrupt Control Register).
Transfer Types TT1-TT0 (with the value of %00).
Transfer Modifiers TM2-TM0 (with the value of %101).
Transfer Start