VMEchip2
Interrupt Level Register 1 (bits 0-7)
2
ADR/SIZ
BIT
NAME
OPER
RESET
Interrupt Level Register 2 (bits 24-31)
ADR/SIZ
BIT
NAME
OPER
RESET
2-92
$FFF40078 (8 bits [6 used] of 32)
7
6
TICK2 LEVEL
R/W
0 PSL
This register is used to define the level of the tick timer 1 interrupt
and the tick timer 2 interrupt.
TICK1 LEVEL These bits define the level of the tick timer 1
interrupt.
TICK2 LEVEL These bits define the level of the tick timer 2
interrupt.
$FFF4007C (8 bits [6 used] of 32)
31
30
29
VIA LEVEL
R/W
0 PSL
This register is used to define the level of the DMA controller
interrupt and the VMEbus acknowledge interrupt.
DMA LEVEL These bits define the level of the DMA controller
interrupt.
VIA LEVEL
These bits define the level of the VMEbus
interrupter acknowledge interrupt.
5
4
3
28
27
2
1
0
TICK1 LEVEL
R/W
0 PSL
26
25
24
DMA LEVEL
R/W
0 PSL