Main Registers; Table 5-6 Fpga Memory Map - 8-Bit Chip Select; Table 5-7 Main Registers - GE C2K Hardware Reference Manual

Table 5-6 lists the FPGA memory map for the 8-bit chip select. Addresses are given as word
addresses as required by the MV64460.
FPGA memory map - 8-bit Chip Select
Table 5-6
Address
USART
0x00-0x07 USART 0
0x10-0x17 USART 1
0x20-0x27 USART 2
0x30-0x37 USART 3
0x40-0x47 USART 4
0x50-0x57 USART 5
0x60-0x67 Unused
0x70-0x77 Unused
0x80-0x86 UART 8 (dedicated to C8051)

5.2.1 Main Registers

The main registers provide revision information for the FPGA firmware, as well as status and
control for various functions. Table 5-7 lists the main registers.
Main registers
Table 5-7
Offset Register
0x0 FPGA Revision
0x8 Status
0x10 Control
0x12 Reset Control
FPGA Revision Register
The FPGA Revision Register contains the binary-coded decimal revision number for the current
FPGA firmware. It is formatted as version number (most significant 16-bits) and revision number
(least significant 16-bits).
NOTE: The revision number is subject to change.
Address offset: 0x0
Access: Read-only
Bits Field
15 to 8 REV
7 to 0 VER
5-7
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Description
Provides FPGA firmware revision information.
Provides status information for various board functions.
Provides configure and control settings for various board functions.
Provides software control of the on-board reset lines.
Default Description
0x01 Revision (major) number
0x01 Version (minor) number
Description
Resources
C2K User's Guide