Cop_En (P10); C8051 Debug (P11); Header/Jumper Locations; Installation - GE C2K Hardware Reference Manual

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2.4.4 COP_EN (P10)

P10 is a 2-pin COP Enable header/jumper that isolates the MPC7448 processor from the JTAG

Scan chain and connects the COP header (J6) to the processor to enable software debugging (see

"JTAG circuitry" on page 4-18).

If a jumper is installed on P10, the on-board COP header (J6) is connected to the MCP7448

processor for software debugging.

If a jumper is not installed on P10, the COP header (J6) is disconnected from the processor.

P11 is a 2-pin C8051 Debug header/jumper that isolates the C8051 Microcontroller from the

JTAG Scan chain to enable IPMI software debugging.

If a jumper is installed on P11, the C8051 debugging is enabled.

If a jumper is not installed on P11, the C8051 debugging is disabled.

For header/jumper locations, please refer to Figure 3-2 on page 3-2.

NOTE: With the exception of the PCI Bus VIO Select header/jumpers (P9 and P12), none of the

preceding header/jumpers need to have a jumper installed for C2K initial power-up.

Caution!

Do not attempt to install the C2K in a backplane where the J4 connector is

bused or routed in accordance with the CompactPCI H110 specification. The C2K is

equipped with an IEC key to prevent such installation but if the backplane is not

keyed, installation is still possible.

Caution!

Do not attempt to install the C2K in a Fabric slot of a PICMG 2.16 Packet

Switching Backplane. The C2K is equipped with an IEC key to prevent such

installation, but if the backplane is not keyed installation is still possible.

1. Remove the C2K from the static-safe envelope (see "E.S.D. Caution" on page 2-1).

2-3

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Installation

C2K User's Guide

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