GE C2K Hardware Reference Manual page 98

GPIO Interrupt Mask Register
The GPIO Interrupt Mask Register provides interrupt masking for the common GPIO interrupt
output.
Address offset: 0x46
Access: Read/write
Bits Field
15 GPIO15_INT_MSK
14 GPIO14_INT_MSK
13 GPIO13_INT_MSK
12 GPIO12_INT_MSK
11 GPIO11_INT_MSK
10 GPIO10_INT_MSK
9 GPIO9_INT_MSK
8 GPIO8_INT_MSK
7 GPIO7_INT_MSK
6 GPIO6_INT_MSK
5 GPIO5_INT_MSK
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Default
1 GPIO15 Interrupt Mask—blocks (masks) GPIO15 interrupt
output.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO14 Interrupt Mask—blocks (masks) GPIO14 interrupt
output.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO13 Interrupt Mask—blocks (masks) GPIO13 interrupt
output.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO12 Interrupt Mask—blocks (masks) GPIO12 interrupt
output.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO11 Interrupt Mask—blocks (masks) GPIO11 interrupt
output.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO10 Interrupt Mask—blocks (masks) GPIO10 interrupt
output.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO9 Interrupt Mask—blocks (masks) GPIO9 interrupt out-
put.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO8 Interrupt Mask—blocks (masks) GPIO8 interrupt out-
put.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO7 Interrupt Mask—blocks (masks) GPIO7 interrupt out-
put.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO6 Interrupt Mask—blocks (masks) GPIO6 interrupt out-
put.
0 = enable interrupt
1 = disable (mask) interrupt
1 GPIO5 Interrupt Mask—blocks (masks) GPIO5 interrupt out-
put.
0 = enable interrupt
1 = disable (mask) interrupt
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Description
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