GE C2K Hardware Reference Manual page 76

Bits Field
5 NMI_GPIO_EN
4 PROCFAIL_GPIO_EN
3 Not used
2 BIT_NOT_PASS
1 ROM_WP
0 BOOT_AREA_WP
* Indicates bit only resets to default value on power-up, and is not affected by a hard reset event.
Reset Control Register
The Reset Control Register .
Address offset: 0x12
Access: Read/write
Bits Field
15 - 6 Not used
5 PMC1_RESET
4 PCI1_RESET
3 PMC0_RESET
2 PCI0_RESET
1 PHY_HARD_RESET
0 PHY_SOFT_RESET
C2K User's Guide
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Default
0 NMI# Enable on GPIO_15—enables the NMI# input on GPIO 15
port.
0 = standard GPIO_15 line
1 = NMI# signal input on GPIO_15
0 PROCFAIL# Enable on GPIO_14—enables the PROCFAIL# output
on GPIO 14 port.
0 = standard GPIO_14 line
1 = PROCFAIL# signal output on GPIO_14
- Not used
1 Built In Test Failure—indicates the status of firmware's Built-In-Test
(BIT).
0 = test successful
1 = test has not yet been performed or test failed
1 Flash Write-protect—asserts flash write-protection.
0 = do not assert write-protection
1 = assert write-protection
1 Boot Area Write-Protect—asserts write-protection to the emergency
boot code area of Flash ROM (upper 8MB of Flash Bank 0).
0 = do not assert boot write-protection
1 = assert boot write-protection
Default
- Not used
0 PMC1 Reset Control
0 = reset negated
1 = reset asserted
0 PCI1 Reset Control
0 = reset negated
1 = reset asserted
0 PMC0 Reset Control
0 = reset negated
1 = reset asserted
0 PCI0 Reset Control
0 = reset negated
1 = reset asserted
0 PHY Hard Reset Control
0 = reset negated
1 = reset asserted
0 PHY Soft Reset Control
0 = reset negated
1 = reset asserted
Description
Description
Resources
5-10