NEC 78014Y Series User Manual page 97

Data Memory
Space
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CHAPTER 5 CPU ARCHITECTURE
Figure 5-3. Memory Map ( µ PD78013, 78013Y)
FFFFH
Special Function
Registers (SFR)
256 × 8 bits
F F 0 0 H
General Registers
FEFFH
32 × 8 bits
FEE0H
FEDFH
Internal High-Speed RAM
1024 × 8 bits
FB00H
FAFFH
Use Prohibited
FAE0H
FADFH
Buffer RAM
FAC0H
FABFH
Use Prohibited
FA80H
FA7FH
External Memory
39552 × 8 bits
Program 6 0 0 0 H
Memory
5FFFH
Space
Internal ROM
24576 × 8 bits
0 0 0 0 H
32 × 8 bits
5FFFH
Program Area
1000H
0FFFH
CALLF Entry Area
0800H
07FFH
Program Area
0080H
007FH
CALLT Table Area
0040H
003FH
Vector Table Area
0000H
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