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Example 1. Two multiple interrupts are generated
During interrupt INTxx servicing, two interrupt requests, INTyy and INTzz are acknowledged, and a multiple
interrupt is generated. An EI instruction is issued before each interrupt request acknowledge, and the interrupt
request acknowledge enable state is set.
Example 2. Multiple interrupt is not generated by priority control
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The interrupt request INTyy generated during interrupt INTxx servicing is not acknowledged because the interrupt
priority is lower than that of INTxx, and a multiple interrupt is not generated. INTyy request is retained and
acknowledged after execution of 1 instruction execution of the main processing.
PR = 0 : High-priority level
PR = 1 : Low-priority level
IE = 0 : Interrupt request acknowledge disabled
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CHAPTER 18 INTERRUPT FUNCTIONS AND TEST FUNCTION
Figure 18-15. Multiple Interrupt Examples (1/2)
Main Processing
IE = 0
EI
INTyy
INTxx
(PR = 0)
(PR = 1)
Main Processing
EI
INTxx
(PR = 0)
1 Instruction
Execution
INTxx
INTyy
Servicing
Servicing
IE = 0
EI
EI
INTzz
(PR = 0)
RETI
RETI
INTxx
Servicing
IE = 0
EI
INTyy
(PR = 1)
RETI
IE = 0
INTzz
Servicing
IE = 0
RETI
INTyy
Servicing
RETI
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