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Table 6-5. Port Mode Register and Output Latch Setting when Alternate Function is Used
Pin Name
P00
P01 to P03
Note 1
P04
P10 to P17
P30 to P32
P33, P34
P35
P36
Notes 1. Read data will be undefined if the read instruction is executed for the port when used as alternate function
2. When pins P40 to P47, P50 to P57 and P64 to P67 are used as alternate function pins, set the functions
Cautions 1. When external wait is not used in memory expansion mode, P66 pin can be used as an input/
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Remark ×
Alternate Function
Function
Input/
Name
Output
INTP0
Input
TI0
Input
INTP1 to INTP3 Input
XT1
Input
Note 1
ANI0 to ANI7
Input
TO0 to TO2
Output 0
TI1, TI2
Input
PCL
Output 0
BUZ
Output 0
pin.
with a memory expansion mode register (MM).
output port.
2. When Port 2 is used as serial interface pin, input/output and the output latch should be set
according to functions. For setting, refer to Figure 15-5 Serial Operating Mode Register 0
Format, Figure 16-6 Serial Operating Mode Register 0 Format, and Figure 17-3 Serial Operating
Mode Register 1 Format.
: don't care (no setting required)
PM××
: Port mode register
P××
: Port output latch
CHAPTER 6 PORT FUNCTIONS
PM××
P××
Pin Name
1 (defined) None
P40 to P47
1 (defined) None
×
1
P50 to P57
1 (defined) None
P64
×
1
P65
0
P66
×
1
P67
0
0
Alternate Function
PM××
Function
Input/
Name
Output
×
AD0 to AD7
Input/
Note 2
Output
×
A8 to A15
Output
Note 2
×
Note 2
RD
Output
×
Note 2
WR
Output
×
WAIT
Input
Note 2
×
Note 2
ASTB
Output
P××
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