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Figure 8-3. 16-Bit Timer/Event Counter Output Control Circuit Block Diagram
LVR0
LVS0
TOC01
INTTM0
Edge
TI0/P00/
detector
INTP0
circuit
2
ES10, ES11
PWM pulse
generator
Remark
The circuitry enclosed by the dotted line is the output control circuit.
Level F/F
(LV0)
R
Q
S
INV
3
Active level control
TMC01 to TMC03
TOC01
3
TMC01 to TMC03
TOE0
TO0/
P30
PM30
P30
output latch
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