NEC 78014Y Series User Manual page 236

(2) Watchdog timer mode register (WDTM)
This register sets the watchdog timer operating mode and enables/disables counting.
WDTM is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets WDTM to 00H.
Symbol <7>
WDTM RUN
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Notes 1. Once set to 1, WDTM3 and WDTM4 cannot be cleared to 0 by software.
2. Interval timer operation starts when the RUN bit is set to 1.
3. Once set to 1, RUN cannot be cleared to 0 by software. Thus, once counting starts, it can only be stopped
by RESET input.
Cautions 1. When 1 is set in RUN so that the watchdog timer is cleared, the actual overflow time may be
2. In watchdog timer mode 1 or 2, make sure that the interrupt request flag (TMIF4) is set to 0
Remark x: don't care
236
CHAPTER 11 WATCHDOG TIMER
Figure 11-3. Watchdog Timer Mode Register Format
6 5 4 3
0 0 WDTM4 WDTM3
up to 0.5% shorter than the time set by timer clock select register 2 (TCL2).
before setting WDTM4 to 1. If WDTM4 is set to 1 while TMIF4 is set to 1, a non-maskable
interrupt request occurs regardless of the contents in WDTM3.
2 1 0 Address
0 0 0 FFF9H
WDTM4 WDTM3 Watchdog Timer Operating Mode
0
1
1
RUN
0
1
When Reset R/W
00H R/W
Selection Note 1
x Interval timer Mode Note 2
(Maskable interrupt request occurs
upon generation of an overflow.)
0 Watchdog timer mode 1
(Non-maskable interrupt request
occurs upon generation of an
overflow.)
1 Watchdog timer mode 2
(Reset operation is activated upon
generation of an overflow.)
Watchdog Timer Operation Selection
Count stop
Counter is cleared and counting starts.
Note 3