NEC 78014Y Series User Manual page 294

R/W ACKE
0
1
R ACKD
Clear Conditions (ACKD = 0)
• At the falling edge of SCK0 clock immediately after the
busy mode has been released when a transfer start
instruction is executed
• When CSIE0 = 0
• When RESET input is applied
Note
R/W BSYE
0
1
Note Busy mode can be cleared by start of serial interface transfer. However, the BSYE flag is not cleared to 0.
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Remark CSIE0: Bit 7 of the serial operating mode register 0 (CSIM0)
294
CHAPTER 15 SERIAL INTERFACE CHANNEL 0 ( µ PD78014 Subseries)
Acknowledge Signal Automatic Output Control
Acknowledge signal automatic output disable (output with ACKT enable)
Before completion Acknowledge signal is output in synchronization with the 9th clock
of transfer falling edge of SCK0 (automatically output when ACKE = 1).
After completion Acknowledge signal is output in synchronization with the falling edge of SCK0
of transfer clock immediately after execution of the instruction to be set to 1 (automatically
output when ACKE = 1).
However, not automatically cleared to 0 after acknowledge signal output.
Acknowledge Detection
Synchronizing Busy Signal Output Control
Disables busy signal which is output in synchronization with the falling edge of SCK0 clock immediately
after execution of the instruction to be cleared to (0) (with READY state).
Outputs busy signal at the falling edge of SCK0 clock following the acknowledge signal.
Set Conditions (ACKD = 1)
• When acknowledge signal (ACK) is detected at the
rising edge of SCK0 clock after completion of transfer
(continued)