NEC 78014Y Series User Manual page 404

(2) Restriction on slave device operation in the I
Applied devices:
Description:
www.DataSheet4U.com
Transfer line
SCL
SDA0 (SDA1)
Slave device operation
Software
operation
SIO0
404
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( µ PD78014Y Subseries)
2
µ PD78011BY, 78012BY, 78013Y, 78014Y, 78P014Y
IE-78014-R-EM
If all of the following conditions are satisfied, all slave devices on the transfer line cannot
transmit data.
• The µ PD78014Y subseries device is used as one of the slave devices in the I
• The master device outputs the stop condition signal when it terminates transmission to the
µ PD78014Y Subseries device (i.e. slave reception).
• Following the master transmission operation to the µ PD78014Y Subseries device (i.e. slave
reception), the master reception (i.e. slave transmission) request is sent to any unit.
In the µ PD78014Y Subseries, communication is started by writing data in serial I/O shift
register 0 (SIO0). In data reception operation, write FFH in SIO0 to be high-impedance state
the N-ch open-drain output.
After writing FFH into SIO0 of the µ PD78014Y Subseries device, if the master device drives
the SCL line to high level to output the start condition or stop condition signals, then SIO0
shift operation is carried out in the µ PD78014Y Subseries device (slave device). As a result,
written FFH is shifted and LSB of SIO0 becomes equal to the level of SDA0 (SDA1).
If the master device drives SCL to high level after driving SDA0 (SDA1) to low level to output
a stop condition signal as shown in the following figure, then the contents of SIO0 change
to FEH (LSB = 0) according to the above-mentioned operation. Therefore the LSB of next
reception data must be "0".
The reception data which follows the start condition signal is defined as the slave address
field, and the LSB of the slave address field is defined as the transfer direction specification
bit. The LSB of the slave address field must be "0", so that it indicates the slave reception
operation regardless of the data output from the master device.
Change to FEH at this point
C bus mode
Stop condition Start condition
SIO0 ← FFH
FEH
2
C bus mode.
This bit must be "0".